SystemVerilog: The Complete Solution

SystemVerilog: The Complete Solution:

"The electronics industry is constantly challenged by the ever-growing design and verification requirements for complex chips. With the IEEE-Std 1800-2005 System-Verilog standard, the industry has a complete, unified language capable of handling these challenges for today and tomorrow.

The unprecedented level of vendor support, rapid adoption by hundreds of development teams worldwide, and dozens of tapeouts all attest that SystemVerilog is the right language at the right time.

More than 40 EDA, IP, and training vendors have announced more than 90 products and services supporting SystemVerilog."

La Suite

Design Automation Conference (DAC) 2006

Design Automation Conference (DAC) 2006:

"July 24-28, 2006
San Francisco, CA • Moscone Convention Center

The Design Automation Conference (DAC) is the premier Electronic Design Automation (EDA) and silicon solution event. DAC features over 50 technical sessions covering the latest in design methodologies and EDA tool developments and an Exhibition and Demo Suite area with over 250 of the leading EDA, silicon and IP Providers.

For More Information
Web site: http://www.dac.com "

Jaluna - Virtual Infrastructure Software for Connected Devices

Jaluna - Virtual Infrastructure Software for Connected Devices:

Jaluna OSware, Linux Edition

"Jaluna OSware, Linux Edition is an innovative and high-performance solution providing concurrent support for the Linux operating system, and in-house or commercial Real Time Operating Systems (RTOS) on CPUs and DSPs.

Jaluna OSware has been designed for products requiring the broad feature set of Linux combined with the pre-ported stacks, or real-time performance of RTOS solutions.

Jaluna OSware, Linux Edition enables developers to consider completely new and flexible architectures for their embedded products, yielding lower bill of materials (BOM) and development costs, enhanced preservation of intellectual property, and faster time to market.


Benefits:

Introduce Linux into existing products while preserving previous software investments
Re-use existing applications with native behavior and performance
Save development costs and bill of materials while reducing time-to-market
Protect Intellectual Property while using Open Source software

"

Synopsys Acquires Virtio Corporation

Synopsys Acquires Virtio Corporation:

"Acquisition to Address Exponentially Growing Software Design Bottleneck

MOUNTAIN VIEW, Calif. - May 16, 2006 - Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced it is expanding its presence in electronic system level (ESL) design by acquiring Virtio Corporation, creator of virtual platforms for embedded software development. The combination of Synopsys' System Studio solution with Virtio's virtual prototyping technology will help accelerate systems to market by giving software developers the ability to begin code development much earlier than with prevailing methods. The acquisition also puts Synopsys in a unique position to provide an integrated implementation, verification and IP solution to speed up hardware and software development.

Software content in systems continues to grow exponentially, creating a high level of complexity that has increased the need to validate the hardware and software of electronic systems as a whole. Waiting for the availability of prototype hardware in order to begin software development is delaying product delivery. A virtual platform solves this problem by providing a software model that allows developers to run and debug actual code at near real-time speeds, thus allowing development of drivers, operating systems and applications without the need for prototype hardware.

'System designers know they can get their products to market much earlier and with more confidence if embedded software development could begin without having to wait for the completion of the physical board and SoCs,' said John Chilton, senior vice president and general manager of the Solutions Group at Synopsys. 'Mutual Synopsys and Virtio customers are telling us that by using Virtio's virtual platform technology they've been able t ..."

PowerEscape rounds out software development tool line

PowerEscape rounds out software development tool line:

"SAN FRANCISCO — Startup PowerEscape Inc. Tuesday (Nov. 8) introduced PowerEscape Insight, a tool promising to improve the data-efficiency of algorithms in the initial phases of development, enabling software developers to improve performance and minimize the need for time-consuming assembly code optimization.

PowerEscape said that while traditional software optimization has focused on computational efficiency by replacing sections of C code with assembly code, optimizations for data efficiency can be made much earlier in the development cycle by simply changing C code to reduce data movement between memories and the processor using its product line. In addition to achieving higher performance and lower power, data-efficiency increases software portability and time-to-market, the company said.

'Customers have proven that with our products they can improve software performance while reducing power consumption by a factor of 3 or more,' said Guido Arnout, president and CEO of PowerEscape, in a statement. 'Improving data efficiency has become key to achieving higher performance, lower power and higher performance per watt.'

According to PowerEscape (Palo Alto, Calif.) the introduction of PowerEscape Insight rounds out the company's line of tools for data efficient software development, providing relevant technology from the creation of reference algorithms to the optimization of software for a specific memory platform. PowerEscape's product line also includes PowerEscape Architect and PowerEscape Synergy.
PowerEscape Architect, Synergy and Insight are available immediately.

The products run on Microsoft Windows XP, Red Hat Enterprise Linux, Red Hat Linux or Red Hat Fedora Core and Apple Mac OS X Tiger. Pricing information was not provided ..."

EDA startup snares $4.5 million in funding from Intel, others

EDA startup snares $4.5 million in funding from Intel, others:

"SAN FRANCISCO — EDA startup ArchPro Design Automation has raised $4.5 million in Series B funding from Intel Capital, Entrepia Ventures and Sage Technology Ventures LLC, the company said Tuesday (May 23).

Total venture capital investment in ArchPro to date is now $5.5 million, the company said.
ArchPro (San Jose, Calif.) develops EDA products for solving power management design challenges at the 90-nanometer node and below.

According to ArchPro Chairman and CEO Pratap Reddy, who joined the company earlier this month, the company is moving from product development to wide scale customer deployment of its tools for multi-voltage simulation, rule checking, and synthesis.

'This funding allows us to aggressively expand our sales and marketing efforts while continuing the development of breakthrough products for low-power design,' Reddy said.

Within the past six months ArchPro has launched its first three products and expanded its R&D operations in San Jose, Calif. and Bangalore, India, the company said.

'The move to finer design geometries will cause designers to address multi-voltage situations up front due to the need to incrementally save power across a large number of transistors,' said Shishpal Rawat, director of EDA investments for Intel Capital. 'ArchPro's integrated design solutions help engineers design and verify multi-voltage architecture in a well-defined, top-down flow.' "